Translating Waveform Generation Language Files (WGL) to Marvin Test Solutions DIO File Format

Knowledge Base Article # Q200203

Read Prior Article Read Next Article
Summary Using the DIOEasy-FIT toolkit to import and use WGL file

Defining WGL

The Waveform Generation Language (WGL) is a data description language supported by Test Systems Strategies Inc.  A WGL file uses an ASCII representation of the digital waveform data, so can be edited using any text editor.  WGL is also an intermediate file format used by the semiconductor industry for converting digital test patterns from a logic simulator to tester hardware, and back again.

Test information is represented in a WGL file using a structured, free form language with small, specialized structural blocks contained within larger, more generalized blocks.  A full discussion of the WGL language and syntax is beyond the scope of this article, but can be found in the TDS Languages Guide, Version 2007.1, published by Test Systems Strategies, Inc.  The benefit of WGL is that any digital instrument or tester that is capable of reading or writing test patterns using the WGL language, has a link to any simulation tool that also supports WGL, either directly between the simulator and tester hardware, or indirectly through other translators or filters.

To illustrate the Marvin Test Solutions Digital I/O (DIO) WGL import filter, a DownloadSimple WGL file was manually generated.  Note, this is not a typical WGL file as many of the structural blocks are excluded for clarity.  But it does serve as a good primer into the WGL file structure and facilitates demonstrating the process for importing WGL files into the Marvin Test Solutions DIO format.

A Simple WGL File

Waveform Sample

  Signal
    Stim00   : input;
    Stim01   : input;
    Stim02   : input;
    Stim03   : input;
    Stim04   : input;
    Stim05   : input;
    Stim06   : input;
    Stim07   : input;
    Stim08   : input;
    Stim09   : input;
    Stim10   : input;
    Stim11   : input;
    Stim12   : input;
    Stim13   : input;
    Stim14   : input;
    Stim15   : input;
    Resp00   : output;
    Resp01   : output;
    Resp02   : output;
    Resp03   : output;
    Resp04   : output;
    Resp05   : output;
    Resp06   : output;
    Resp07   : output;
    Resp08   : output;
    Resp09   : output;
    Resp10   : output;
    Resp11   : output;
    Resp12   : output;
    Resp13   : output;
    Resp14   : output;
    Resp15   : output;
  End

  Timeplate Match_0 Period 100nS
    Stim00   := input[0pS:S];
    Stim01   := input[0pS:S];
    Stim02   := input[0pS:S];
    Stim03   := input[0pS:S];
    Stim04   := input[0pS:S];
    Stim05   := input[0pS:S];
    Stim06   := input[0pS:S];
    Stim07   := input[0pS:S];
    Stim08   := input[0pS:S];
    Stim09   := input[0pS:S];
    Stim10   := input[0pS:S];
    Stim11   := input[0pS:S];
    Stim12   := input[0pS:S];
    Stim13   := input[0pS:S];
    Stim14   := input[0pS:S];
    Stim15   := input[0pS:S];
    Resp00   := output[0pS:Q];
    Resp01   := output[0pS:Q];
    Resp02   := output[0pS:Q];
    Resp03   := output[0pS:Q];
    Resp04   := output[0pS:Q];
    Resp05   := output[0pS:Q];
    Resp06   := output[0pS:Q];
    Resp07   := output[0pS:Q];
    Resp08   := output[0pS:Q];
    Resp09   := output[0pS:Q];
    Resp10   := output[0pS:Q];
    Resp11   := output[0pS:Q];
    Resp12   := output[0pS:Q];
    Resp13   := output[0pS:Q];
    Resp14   := output[0pS:Q];
    Resp15   := output[0pS:Q];
  End

  Pattern Loopback (Stim00,Stim01,Stim02,Stim03,Stim04,Stim05,Stim06,Stim07,Stim08,Stim09,Stim10,
                    Stim11,Stim12,Stim13,Stim14,Stim15,Resp00,Resp01,Resp02,Resp03,Resp04,Resp05,
                    Resp06,Resp07,Resp08,Resp09,Resp10,Resp11,Resp12,Resp13,Resp14,Resp15)

    {Start Vectors}
    Loop 32
      Vector(+, Match_0) := [1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
      Vector(+, Match_0) := [1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
    End

    Repeat 4
      {End Vectors}
      Vector(+, Match_0) := [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
    End
  End
End


The keyword Waveform denotes the beginning of a waveform block called Sample.  Within the Waveform block are several sub-blocks; the first is a sub-block denoted by the keyword Signal.  This block defines the signal names and types.  The point of reference for the signal types is the UUT, meaning that all the Input signals (Stim Names) are input to the UUT, and all Output signals (Resp  signal names) are output from the UUT.  WGL defines other signal types that are not used in this example.

The Timeplate keyword defines the beginning of the block structure called Match_0, where signal timing is defined.  It also defines the period of the Match_0 timing set to be 100nS – a 10 MHz data rate.  All of the Stim signals are defined as being active at the beginning of the test cycle (0pS), and the driven data pattern will be substituted (:S) by the value in the signals associated bit position within Pattern block (discussed later).  All of the Resp signals are defined as being active at the beginning of the test cycle (0pS), and the compare data pattern will be substituted (:Q) by the value in the signals associated bit position within Pattern block.

The Pattern block called Loopback first defines the bit ordering for the subsequent data patterns.  The ordering is LSB first, so Stim00 is the LSB data position, and the drive state is be represented by the left-most bit value in the vector field.  Bit ordering continues with Resp15 being the MSB, with the compare state being represented by the right-most bit value in the vector field.

The Vector field defines the substitute I/O patterns for the :S and :Q signals defined in the Match_0 Timeplate, and stipulating the Match_0 timeplate specifies the timing parameters to use.  In WGL, each vector has the capability of using different timing parameters, although that is not the case in our simple example.  The data pattern for the Stimulus pins and Response pins is a Walking 1 pattern from the LSB word to the MSB word, providing a 16-bit loop back pattern (16 LSB Stimulus pins to 16 MSB Response pins).  The pattern is entered once, but looped 32 times, as denoted by the Loop keyword.  The final four vectors are a repeat of the last vector, which contains all 0’s for both the Stimulus and Response signals, as indicated by the Repeat keyword.

Each sub-block structure is terminated by the End keyword, and the text contained in the curly-braces {} indicated text labels that are included as labels in the resulting DIO file.

WGL can represent simple Stimulus/Record digital test patterns, as well as more complex Stimulus/Response patterns that incorporate Real-Time compare functionality.  Since several Marvin Test Solutions DIO products support both functions, this article will demonstrate importing the sample WGL file both ways.

Activating DIOEasy-FIT - WGL Import Toolkit

The Marvin Test Solutions WGL import utility is a licensed product of Marvin Test Solutions , Inc.  Once purchased, the File Import Translator license (FIT) can be activated by entering a unique license string for the system.  The license string is based on the Computer ID of the host system where the license will be installed, and can be found from DIOEasy by clicking on Help\About DIOEasy\Setup License, and selecting Setup License (see figure 1).

License Setup

Figure 1:  File Import Translator License Setup


The computer ID is the 10 digit code displayed at the bottom of the DIOEasy License Setup dialog - "XXXX YYYY ZZ" in figure 2.  To obtain the FIT license, open a Magic incident, request an FIT license, and provide the sales order number of your FIT purchase and the Computer ID.  You will receive a license that is unique to the system whose ID you provided.  Enter the license string in the "License String/File" text box and click on "OK".

Computer ID
Figure 2:  Computer ID Code


The Marvin Test Solutions WGL import utility is supported using DIOEasy, Marvin Test Solutions' interactive digital development tool set, and from GtDio32.dll API, a Dynamic Link Library of DIO software functions.  The full list of these DIO functions and their syntax and uses can be found in the "DioSoftwareProgRef.PDF" document.  This document is included with the GtDio.Exe driver installation package available from the Marvin Test Solutions web page:

http://www.marvintest.com/Downloads.aspx?prodId=16&search=package

The DioFileImportWgl Function

One of the functions included in the GtDio32.Dll is DioFileImportWgl().  This function is an import utility for reading WGL formated digital test patterns and converting them into a Marvin Test Solutions DIO formatted file.  The file can be loaded to the instrument, opened for viewing and editing using DIOEasy, or opened under program control so digital pattern data can be accessed from within a test program.  The syntax for this function, and an example of it’s usage are provided below:

DioFileImportWgl (pszSourceWglFile, pszDestDioFile, nConversionMode, nBoardType, pdMaxFrequncy, pdwMaxSteps, pszError, nErrMaxLen, pnStatus)

Parameters:
NameTypeComments
pszSourceWglFilePCSTRSource file
pszDestDioFilePCSTRTarget DIO file name
nConversionModeSHORTConversion mode:
   0 DIO_FILE_WGL_TO_DIO: Standard DIO file.
   1 DIO_FILE_WGL_TO_DIO_RTC: Real Time Compare DIO file
nBoardTypeSHORTSets the target supported DIO board type:
   0x55 DIO_BOARD_TYPE_GX5055 – Gx5055 DIO board type.
   0x70 DIO_BOARD_TYPE_GX5290 - Gx5290 DIO board type.
   0x75 DIO_BOARD_TYPE_GX5290E - Gc5290 Express DIO board type.
   0x7A DIO_BOARD_TYPE_GX5295 - Gc5295 board type.
pdMaxFrequncyPDOUBLE 0 for the WGL importer to use the best vector clock frequency, otherwise overwrites the vector max frequency.
pdwMaxStepsPDWORDThe maximum number of steps to convert.
pszErrorPSTRBuffer to contain the returned error string.
nErrMaxLenSHORTSize of the buffer to contain the error string.
pnStatusPSHORTReturned status: 0 on success, negative number on failure.


Importing WGL In DIOEasy

To import a WGL file into a DIOEasy digital file, click on File from the menu bar, and select Import WGL File.  A dialog will pop up prompting you to select the source WGL file, and the destination DIO file (figure 3).  In addition to specifying the source and destinations files, you must also select the target DIO instrument from the drop-down list (see the nBoardType parameter above), and whether to use the default values for the test frequency (data rate) and file size.  When importing a WGL file, the import filter will determine the optimal timing to use based on the capabilities of the DIO instrument selected, and set the clock rate accordingly.

DIOEasy WGL Import Dialog
Figure 3:  DIOEasy WGL Import Dialog


One final selection is whether to translate the WGL patterns for stimulus/record operations with Post Process compare, or to translate the WGL patterns for Real-Time compare.  Real-Time compare has the advantage of performing a hardware comparison of the UUT response against a pre-loaded expected response.  Since the compare process is done in hardware, and at the speed the digital engine is operating at, pass/fail results are instantaneous, whereas, post-process compare requires software to read the recorded information from the DIO hardware, and compare each step against a reference file that contains the expected UUT response.  The WGL import filter supports both test methodologies, as do selected Marvin Test Solutions digital instruments.

Once the import process completes, a new DIO file is created and automatically loaded to DIOEasy.  The file can be viewed and edited, the same as any other DIO file, and the test file can be loaded to the DIO hardware for execution.  Figure 4 shows a portion of the translated Simple.WGL file.

Translated Simple.WGL Digital Test Patterns
Figure 4:  Translated Simple.WGL Digital Test Patterns


Timing Translation

A common concern when porting digital test from the simulation environment to hardware is how timing parameters are interpreted.  A simulator can generate process with picosecond timing resolution.  This is far beyond the capability of the actual hardware test system to implement.  The WGL import filter will try to fit the timing parameters into the capabilities of the hardware by adjusting the clock frequency to accommodate the minimum phase resolution between the signals.  This is done by dividing the WGL test cycle time by the minimum phase difference between the various signals.  For example, if you had a WGL file with a cycle time of 1uS (1 MHz data rate), but there was a setup parameter of 10nS between a clock and data channel, the importer would calculate a new data rate for the hardware that meets both criteria.  In this example, the digital hardware would run at 100 MHz, providing the 10nS phase resolution.  This translates to more digital test vectors loaded into the hardware than the native WGL file represents.  In this case, 1uS period / 10nS resolution results in 10:1 pattern depth on the digital tester.  So, if the WGL pattern file were initially 1M vectors, the pattern file loaded to the hardware would be 10M vectors.

In some cases, the simulated phase resolution exceeds the capability of the tester, so the WGL importer maintains a proportional relationship between the signals.  For example, assume the cycle time is 50nS and some of the channels in that cycle change on 5nS phases (200 MHz resolution).  The WGL importer determines that one WGL cycle will require ten DIO cycles (50nS period / 5nS resolution).  Assuming the hardware is the GX5292, the minimum  cycle timing for this instrument is 10nS (100 MHz maximum frequency), so the pattern data rate would be set to 100 MHz, but you would maintain the 10:1 pattern ratio to keep the phase relationships proportional to the original WGL pattern ( (50nS period / 5nS resolution) = (100nS period / 10nS resolution) ).
Article Date 10/14/2010 10:06:51 AM     Updated: 5/6/2016 9:00:16 AM
Keywords GX5290 Series, GX5280 Series, WGL

0 ratings | 0 out of 5
Read Prior Article Read Next Article