The GC5050 board has an independent memory for Input, Output and Control that can be configured with either 256K or 1M of memory steps behind each I/O pin. Control and I/O memory are managed as shown in the memory management block diagram (the figure below).
Memory Management Block Diagram
The CLK signal and the sequencer control the program counter. The program counter contains the address of the current control and I/O memory. After resetting, the program counter points to address zero and increments with the CLK signal towards address 1M.