The clock (CLK) signal initiates each output vector. The rate of this signal can be programmed from 750Hz to either 50MHz or 25MHz, depending on the board configuration. Similarly, the strobe signal latches the input vector.
A timing diagram of the CLK and Strobe signals is shown in the figure below.
Signal Timing Diagram
The GT-DIO board can be driven using either internal or external clock source modes. In the internal mode, the Strobe signal occurs Ts (10nSec default) before the next CLK signal. The Strobe signal can be set to 5, 10, or 20nSec before the CLK signal. In the external mode, the Clock and Strobe signal can be provided externally and the timing is defined externally.