Input Data Block Diagram
The figure above is a block diagram of a single pin when operating in input mode. Up to 16 boards can be used in one domain for a maximum of 256 pins (each board containing 32 I/O pins). Input data is stored in the input memory and is stored at the rate of the strobe. The direction memory enables the input when the specified step is defined as input step.
The pin electronics input analog stage is comprised of a set of input pull-up and pull down resistive loads, constant current sink and source loads, and clamping (commutation) sink and source voltages. The input pull-up resistive load and the pull down resistive load can be set to one of the following values, 240 Ohms, 1 KOhms or no load. The input resistive load is useful in applications with very low DUT output swings (where a traditional active load will not switch on and off completely or quickly) and also as a means of forcing the DUT to a known voltage when the DUT is in a Hi-Z state. In addition, the input channel load can be set to have constant source and sink current loads up to 24 mA each with 0.3662 μA of resolution. The input channel’s current source will force the specified constant current to be active when the input voltage is above the high voltage clamp value. The input channel’s current sink forces the specified constant current to be active when the input voltage is below the low voltage clamp value.
The input signal is connected to two comparators. The threshold sense high and low voltage levels are set programmatically by the user. Both the input high and low voltage threshold values can be set from -10.0V to +11.0V.These levels are based on a Vcc voltage of +18 volts and a Vee voltage of -14 volts. The sense hi level must be higher than the input low voltage threshold and the input low voltage threshold must be lower than the input high voltage threshold. Each channel’s operating temperature, the Vcc / Vee voltage rails, drive high / drive low voltages, sense hi / sense lo voltages, and output current values can all be monitored and measured.
The input data will be processed as follows:
● If input data is higher than the high voltage threshold, the input is detected as a logic high. Data will be logged as a logic high to the input memory and a 0 is logged to the valid data memory.
● If input data is lower than the low voltage threshold, the input is detected as a logic low. Data will be logged as a logic low to the input memory and a 0 is logged to the valid data memory.
● If input data is higher than a low voltage threshold and lower than a high voltage threshold, input is invalid. Data will be logged as a logic low to the input memory and logged as a 1 to the invalid data memory.
Note: Each channel’s output and input are connected. As a result whenever a channel defined as output for a specified step, it will be record back to the In Memory while running. |