Timing Module Connectors

This topic describes GX5106 Timing Module connector J1. This 68-pin, very high-density (VHD) connector handles UUT timing and external event signals.

Timing Module 68-Pin (VHD) Connector

Timing Module 68-Pin (VHD) Connector

The following table lists GX5106 Timing signals:

#

Signal

Type

#

Signal

Type

#

Signal

Type

#

Signal

Type

1

Q0+

I

18

ORUN+

O

35

Q0-

I

52

ORUN-

O

2

Q1+

I

19

GND

P

36

Q1-

I

53

GND

P

3

F0+

I

20

BCLK+

O

37

F0-

I

54

BCLK-

O

4

F1+

I

21

GND

P

38

F1-

I

55

GND

P

5

STOP+

I

22

OCLK+

O

39

STOP-

I

56

OCLK-

O

6

START+

I

23

GND

P

40

START-

I

57

GND

P

7

TRIG+

I

24

OSTB+

O

41

TRIG-

I

58

OSTB-

O

8

NU

I

25

GND

P

42

NU

I

59

GND

P

9

UStrb0+

O

26

XTRIG+

I

43

UStrb0-

O

60

XTRIG-

I

10

UStrb1+

O

27

XPAUSE+

I

44

UStrb1-

O

61

XPAUSE-

I

11

UStrb2+

O

28

XCEN+

I

45

UStrb2-

O

62

XCEN-

I

12

UStrb3+

O

29

XSTBEN+

I

46

UStrb3-

O

63

XSTBEN-

I

13

UStrb4+

O

30

GND

P

47

UStrb4-

O

64

GND

P

14

UStrb5+

O

31

XCLK+

I

48

UStrb5-

O

65

XCLK-

I

15

UStrb6+

O

32

XSTB+

I

49

UStrb6-

O

66

XSTB-

I

16

UStrb7+

O

33

VTHI

P

50

UStrb7-

O

67

VTHI

P

17

ARM+

O

34

VTLO

P

51

ARM-

O

68

VTLO

P

 

68-pin Connector J1 (timing) to UUT Unspecified pins are GND

Notes for the table:

Signal

Description

OCLK

Clock Output is not valid when using External Clock Enable (XCEN) with External Clock Input (XCLK).