Marvin Test Solutions’s DIO is a family of high-speed, programmable, dynamic Digital Input and Output (I/O) boards. These boards perform high-speed automated functional testing, device testing, simulation and data acquisition. The DIO family provides real-time digital pattern capture and generation with 32 channels per card and up to 16 cards or 256 channels per system.
The DIO family uses common software development tools to develop test vector files. The test vector files contain digital patterns sent to or received from the Unit Under Test (UUT) and specific pre-defined setting for each board in the setting.
Using DIOEasy or DIO driver functions, the development of vector files can be done without using the actual hardware. Vector file verification requires the DIO be installed and properly configured.
Marvin Test Solutions bundles DIOEasy with all DIO products. DIOEasy, Marvin Test Solutions’s vector development and analysis software, allows manual control of the DIO hardware using the built-in DIO Virtual Instrument Panel. The DIO driver permits control of the DIO family from common software development tools such as Marvin Test Solutions’s ATEasy, Microsoft Visual Basic, Microsoft Visual C++, Borland C++, Borland Delphi and more.
DIOEasy, a Windows application used to develop digital vectors and does not require any programming experience or knowledge to operate.
The DIO Driver and DIOEasy software control the DIO boards. Effective use of the Driver requires an understanding of how DIO boards are used in a system and board capability.
Marvin Test Solutions offers two families of DIO boards:
● DIO 50 Series – Including GX5050, GX5051, GT50 and GT25.
● DIO 51 series – Including GX5150, GX5151, GT5150 and GT5151.
The GT prefix is used to designate boards that are used in computers/chassis with ISA Bus. The GX boards are used for PXI based computers/chassis and the GP boards are used for computers/chassis with PCI Bus.
All families use a Master DIO board to establish synchronization with the UUT and provide timing signals to the Master and DIO Slave boards. The DIO Master also has a Timing and Control Module. This module mounts on the Master. Signals from the timing module provide control and synchronization to the Master’s I/O Module and up to seven Slave I/O Modules. Every DIO configuration needs at least one Master board and can control up to 256 digital input or output channels.
Both families support Slave boards extending the number of UUT I/O channels while maintaining the same timing and pattern sequence. All Slave boards must be of the same family as the Master board.
All families support various I/O modules that are either mounted on the board or connected through a carrier board (I/O modules are connected through a GT5900 carrier board for the GT25/50). The I/O modules expend the interface capabilities of the DIO family in order to provide support for different voltage levels (e.g. User defined, TTL, ECL and more), high-speed capturing, real-time comparison and more.
The GT5900 is a carrier board for I/O modules in order to expend the GT25/50 family interface capabilities. The GT5900 can carry two I/O modules or one I/O module and a Timing Control module.
The Driver and DIOEasy application are common to both families.
The DIO 50 series has 32 channels of I/O. Direction of channels can be switched dynamically from Input to Output at each vector step (in-groups of 8 channels). The series has extended command set for the sequencer that provides programmable control over the vector flow.
The 51 series has a programmable width that can be set to 8, 16, or 32 channels. The boards in this series can be either programmed as Input or as Output directions. The board direction is set to either output or input. Channels can be Enabled/Disables dynamically from at each vector step (in-groups of 8 channels). When disabled, all outputs of the specified group at the specified step will be in Tri-State mode. The series has extended command set for the sequencer that provides programmable control over the vector flow.
Memory depth of the 51 series increases proportionately as the width is reduced. For example if a board has 32M steps with a width of 32 channels, It can be also used as 64M steps with a width of 16 channels or 128M steps per channel with a width of 8 channels.
Note: Family architectures are different and so are capabilities. Some driver functions are available only to a specific family while others work with both families. |
The DIO Driver accesses Master, Slave and carrier boards through the computer’s bus (the figure below). The driver can accommodate up to 16 masters (from either family) and each master can have up to 7 DIO slave boards. ISA based DIOs and carrier boards have switches used to set their base address where PCI and PXI boards are using physical slot numbers that they are installed on in order to identify themselves by the driver. PXI and PCI boards Master and Slave numbers are set through selector switches located on the front.
A DIO domain has one Master DIO board and up to 7 DIO Slave boards. A DIO domain comprise on Master, its Slaves, Carriers and related modules. The figure below shows a domain from two different families on a PC bus.
Two Different DIO Domains on One PC Bus
Domains are internally synchronized and controlled through a Timing cable binding the Master’s Timing module to all domain Slave boards. To synchronize a domain with a UUT, you need to synchronize the Master board’s Timing module.
Masters and slaves within a domain must be members of the same product family. Each Slave adds 32 additional UUT I/O channels. Up to seven slaves can be added to a domain.
Full domain containing eight DIO boards provide up to 256 UUT I/O channels (256 channels wide). Because the driver supports 16 masters, up to 16 domains of mixed types can, in principle, share a computer bus. The number of master/slaves depends on the DIO Bus type (ISA, PXI, PCI), and the number of available free bus slots in your PC.
The following are key GX5150 characteristics and architecture:
● The GX5150 (Master), GX5151 (Slave) and GX5105 (Timing Control) are all Plug and Play (PnP) boards. The operating system such as Windows automatically identify and arbitrate resource requirements as well as notify the user that a new board was found and automatically install the driver for it.
● A DIO domain, when in RUN mode, operates independently of the host computer.
● Each GX515x DIO board supports a maximum clock frequency of up to 50MHz per channel for all channels (total of 1.6GB of data per second). To use this clock rate, all SIMM modules in the domain must be rated at 50MHz
● A GX5150 (Master) board controls the timing of a DIO domain and can be synchronized to a UUT.
● Multiple Master boards are used to synchronize mutually asynchronous UUT elements.
● Each GX5151 (Slave) board adds up to 32 UUT channels. Up to 7 Slave boards can be added to make a total of 256-channel domain.
● DIO boards can support different interfaces (that is different voltage levels) by mounting different I/O Modules (see the GX I-O Modules and Interfaces User's Guide (PXI)).
● Every GX515x board, Master and Slave, require an I/O Module daughter card.
● All GX515x channels of a specific board have the same direction. They are either all input or all output. Channel direction for individual boards in a domain can be different. Board direction can only be changed when the card is not running.
● GX515x output channels can be enabled or disabled dynamically in groups of eight. Disabled channels on output boards are in Tri-State. This is useful for connecting to a user bus. Disabling the outputs has no effect if the board is set up for input.
● Configuration of board memories can vary within a domain. The board with the smallest step capacity limits the available number of vector steps (depth).
● The GX515x’s step (vector) capacity (depth) can be traded for channel capacity (width). The default width is 32 channels. Board depth depends on actual memory capacity. Depth can be increased by a factor of two or four with reduction in number of active channels by the same factor.
● Two registers, A and B, hold pre-defined jump addresses that can be loaded and triggered from the program. Additionally, register A jump addresses can be triggered from external source.
● The external Jump A signal can be programmed to trigger on transition (from '0' to '1') or level (triggers whenever pulled down).
● Triggers can be generated by external events on the Timing module External Event lines. Event and Mask registers are used to determine both the triggering event and the masking bits to be ignored. These use the D Event and Mask registers and T Event and Mask registers.
● External triggering can be initiated on sequential or concurrent events by using both D and T event registers to define events.
● The test sequence (vector) can be paused on external events unconditionally or conditionally. P Event and P Mask registers hold the condition and bits that generate a conditional pause.
● An X Register is used to emulate an external event condition under program control for purposes of test program verification. The register is loaded through the computer bus.
● A DIO domain can be set to have internal or external clock, in order to synchronize with the user UUT.
● A DIO domain clock source (internal or external), active when outputting data, can be programmatically delayed by 12-76 nSec (increments of 1nSec).
● A DIO domain Strobe source (internal or external), active when inputting data, can be programmatically delayed by 5-25 nSec (increments of 5nSec).
● All boards Firmware, GX5150, GX5151, GX5105 and I/O Modules can be upgraded through the DIO driver.