GX5290 Specifications

Feature

Characteristics

Timing Features

Internal Clock (PLL):

Frequency Range

GX5291/GX5292:

1 Hz (Min), 100 MHz (Max for all 32 I/O channels).

GX5293:

1 Hz (Min), 100 MHz (Max for all 32 I/O channels).

1 Hz (Min), 200 MHz (Max with up to 16 I/O channels).

Accuracy

Greater of (+/- 1Hz or +/- 0.02% of programmed value) + accuracy of reference clock (PXI 10 MHz or external refernce clock)

Jitter

+/- 20 mUI of internal clock frequency, max

Reference

PXI 10 MHz clock or XClk (external clock) input

Internal B Clock Output (TTL / LVTTL):

Range

300 KHz to 100MHz (200 MHz for GX5293)

Accuracy

Greater of ( +/- 1 Hz or +/- 0.5% of programmed value) + accuracy of reference clock  

Internal Strobe (OStb) and Output Clock (O Clk) Outputs:

Logic levels

TTL / LVTTL / CMOS / LVCMOS, programmable output voltage level, 1.4 V (min) to 3.6 V (max)

Frequency

Internal clock or External strobe, External clock inputs

Programmable delays (using internal clock source only) for Internal Strobe and Output Clock signals

0 – 27nS in 250pS steps (1 Hz to 100 MHz)

0 – 3nS in 250pS steps (>100 MHz to 200 MHz)

External Test Clock Input

Frequency range (configured as sample clock)

0 to 100MHz , 200 MHz for GX5293

Frequency range ( configured as reference clock to PLL)

8MHz to 10.5 MHz

Pulse Width

40% min., 60% max.

Logic levels

TTL / LVTTL / CMOS / LVCMOS

Input threshold: 1.5 V, 1.8 V, 2.5 V, or 3.3 V (5V tolerant)

External Strobe Clock Input

Frequency range

0 to 100MHz , 200 MHz for GX5293

Logic levels

TTL / LVTTL / CMOS / LVCMOS

Input threshold: 1.5 V, 1.8 V, 2.5 V, or 3.3 V (5V tolerant)

Input/Output Channel Features

Data Direction control

Dynamic, controlled on a per vector and per channel basis

Channels per board

32

Channel configuration per board

( software controlled)

GX5292: 32 / 16 / 8 / 4 / 2 / 1

GX5293: 16 / 8 / 4 / 2 / 1

Memory depth per channel

GX5291: 32Mb – 1 Gb (one channel configuration)

GX5292/GX5293: 64Mb – 2 Gb ( one channel configuration)

Logic families

TTL / LVTTL / CMOS / LVCMOS (1.5 V, 1.8 V, 2.5 V, or 3.3 V or 5V), LVDS, / LVDM / M-LVDS

Note: GX5293 does not support TTL logic family

I/O Levels

TTL/LVTTL/CMOS/LVCMOS:

Prog. Output Voltage Level: 1.4 V (Min); 3.6 V (Max)

Input Threshold: 1.5 V, 1.8V, 2.5V, or 3.3 V (5V tolerant)

Recommended Operating Conditions: 0V (Min); 5.5V (Max)

LVDS/LVDM/M-LVDS: (not supported by the GX5291)

Recommended Operating Conditions:

Voltage Output: -1.4V (Min.); 3.8 V (Max.)

Voltage Input: .05V (Min.); 3.3V (Max.)

Channel timing skew

1nS same card, 1nS between cards

External Status & Control Signals

Logic levels

TTL/LVTTL/CMOS/LVCMOS:

Prog. Output Voltage Level: 1.4 V (Min); 3.6 V (Max)

Input Threshold: 1.5 V, 1.8V, 2.5V, or 3.3 V (5V tolerant)

Trigger source

Software, PXI trigger bus, External event, External trigger input ( overrides Run command)

External Test Clock Enable

Internal (software), External input (via J3 connector)

External Strobe Clock Enable

Internal (software) , External input (via J3 connector)

External Event Bus

16 input lines with mask and logic AND conditioning

Pause

External pause input overrides Pause command

Run

Run status indicator (J3 connector)

Environmental

Operating Temp.

0 to 50°C

Storage Temperature

-20 to 70°C

Physical Properties

Bus Interface

Compact PCI/PXI

Dimensions

Single 3U Compact PCI slot; PXI compatible

Weight

200g

Front Panel Connectors

Label:

J1

I/O TTL Signals, type 68-pin VHD connector

J2

I/O LVDS Signals, type 68-pin VHD connector (GX5292/GX5293)

J3

Timing Signals, type 68-pin VHD connector

J4

Control Connector, type 68-pin VHD connector