Input Data Block Diagram
The figure above is a block diagram of a single pin when operating in input mode. Up to 16 boards can be used in one domain for a maximum of 512 pins (each board containing 32 I/O pins). Input data is stored in the input memory and is stored at the rate of the strobe clock signal. The pin electronics input analog stage is comprised of to two programmable voltage comparators, an active load of constant sink and source currents and a programmable commutation voltage source.
The input signal is connected to two programmable voltage comparators. The threshold sense high and low voltage levels are set programmatically by the user. Both input high and low voltage threshold values can be set from -2.0V to +7.0V with a maximum range span of 8 volts. The sense high level must be higher than the input low voltage threshold and the input low voltage threshold must be lower than the input high voltage threshold. When operating in the drive /record mode, only one of the sense comparators (user defined) is used to record the state of the input data functioning as a single level threshold comparator. For operation in the real-time compare mode, the dual level threshold comparator feature is used to define a valid high and valid low.
The input’s active current load can be set to provide a constant source and sink current of up to 24 mA each. The input channel’s current source will force the specified constant current to be active when the input voltage is above the programmed commutation voltage. Enabling and disabling the input active load is done through software control. Each input channel’s source and sink load currents can be set programmatically.
The input channel’s current load provides a constant current load that is active when the input voltage is above or below the high voltage or low voltage clamp values respectively. The input channel’s constant current source value can be set from 0mA to 24mA with 0.3662 μA of resolution.
The source and sink currents have a common commutating voltage. The commutating voltage can be set from -2.0V to +7.0V. If the input voltage when the load is activated is less than the commutating voltage I-Source will be active. If the input voltage exceeds the commutating voltage then I-Sink will be active. The active load dynamically response to the input voltage.
In order to align propagation delay between input channels each channel’s input sense data high and input sense data low has a programmable skew delay. Skew delay can be programmed separately for the rising and falling edges or for only the falling edge. Input comparator skew delay can be set from 0 ns to + 4.6875 ns with 19.53 ps of resolution. Input comparator falling edge skew delay can be set from -156.25 ps to +146.5 ps with 9.76 ps of resolution. The falling edge delay circuitry adds or subtracts timing delay to or from the falling edge while having no effect on the rising edge. Propagation delay adjustment is typically used for removing any pulse width distortion inside the tester. The propagation delay circuitry adds timing delay to the rising edge and the falling edge in equal amounts. Each input channel has timing capability with the following characteristics:
● Separate and independent delay circuitry for the sense high and sense low input data.
● Separate and independent delay circuitry for each channel.
● Programmable propagation delay adjusts both rising and falling edge equally.
● Programmable falling edge delay circuitry adds or subtracts timing delay to or from the falling edge while having no effect on the rising edge.
Note: Approximately 2 ns of skew delay is reserved for de-skewing the GX5295’s input channels, leaving approximately 2.5 ns available for user applications.