The control memory in a GC5050 and GX5050 contains a 32-bit command for each step. These commands are loaded into the on-board sequencer that controls the flow of the program counter and the direction of I/O channels. Each command is divided into six fields. The table below displays a command layout diagram with the name of each field and bit position. A definition of each command field follows:
BIT # |
31 28 |
27 25 |
24 22 |
21 20 |
19 17 |
16 0 |
Field Name |
I/O Groups Control |
Reserved (0) |
Operation Code |
Register |
Condition |
Address |
Command Layout
Command Field |
Description |
I/O Groups Control bits 31-28 |
These bits control the direction of I/O pin groups, as described in the table Groups Control Field. |
Reserved, bits 27-25 |
Reserved for future versions. Must be set to 0. |
Operation Code, bits 24-22 |
These bits provide the command code, as described in the table Operation Code Field. |
Register, bits 21 and 20 |
Specifies the internal register used with either the related command or the external event line number (0-3) conditions, as described in the table Register Fields. |
Condition, bits 19-17 |
This field is the condition code for related commands and tree address MSBs for the JUMP FAR command. Condition codes are described in the table Condition XXX FieldTable. |
Address, bits 16-0 |
This field contains the address for branch commands: JUMP, LOOP, GOTO and CALL. When the Operations Code is the SET command, this field (bits 0-15) are used as data to be assigned to a register. |
I/O Pins |
Control Word Bit |
Direction for Bit = 1 |
Direction for Bit = 0 |
0-7 |
28 |
IN |
OUT |
8-15 |
29 |
IN |
OUT |
16-23 |
30 |
IN |
OUT |
23-32 |
31 |
IN |
OUT |
I/O Groups Control Field
Mnemonic |
Additional fields |
Value |
Bit 24 |
Bit 23 |
Bit 22 |
NOP |
None |
0 |
0 |
0 |
0 |
JUMP FAR |
Bits 15 – 0 Destination = Address |
1 |
0 |
0 |
1 |
JUMP NEAR |
Condition & Address |
2 |
0 |
1 |
0 |
LOOP |
Reg, Address & Condition |
3 |
0 |
1 |
1 |
SET |
Reg & Address |
4 |
1 |
0 |
0 |
CALL |
Condition & Address* |
5 |
1 |
0 |
1 |
RETURN |
Condition |
6 |
1 |
1 |
0 |
PAUSE |
Condition |
7 |
1 |
1 |
1 |
HALT |
Condition = 7 |
7 |
1 |
1 |
1 |
*Address in the CALL is divided by 8.
Operation Code Field
Register |
External Event Line #B* |
Bit 21 |
Bit 20 |
A |
0 |
0 |
0 |
B |
1 |
0 |
1 |
C |
2 |
1 |
0 |
D |
3 |
1 |
1 |
Register Fields
Condition |
Value |
Bit 24 |
Bit 23 |
Bit 22 |
None |
0 |
0 |
0 |
0 |
External event lines value > Register value |
1 |
0 |
0 |
1 |
External event lines value < Register value |
2 |
0 |
1 |
0 |
External event lines value = Register value |
3 |
0 |
1 |
1 |
External event lines value <> Register value |
4 |
1 |
0 |
0 |
External event line # B is Low* |
5 |
1 |
0 |
1 |
External event line # B is High* |
6 |
1 |
1 |
0 |
HALT when combined with PAUSE command |
7 |
1 |
1 |
1 |
*B is determined by the Register field
Condition XXX Field
When writing commands to a file or to the control memory, the following guidelines should be observed:
1. Commands other than NOP can reside every four steps. Microcode should be the same for all four steps except for I/O Groups Control direction and Operation Code. The Operation Code should be encoded only in the fourth step.
2. The direction can be changed at each step.
3. Control memory and output memory must be written to all boards, Master and Slave.