Clocks

The GX5960 system uses several clocking signals to generate and capture digital vectors from the I/O Channels.

 

Clock Architecture Overview

Master Clock 

The master clock defines the edge or timing resolution. This block contains a fixed 500 MHz master clock oscillator and a Frequency Synthesizer (FS) which may be used in lieu of the 500 MHz oscillator. The reference clock for the Frequency Synthesizer may be the built-in 20 MHz oscillator, 10 MHz PXI clock or an external oscillator in the range of 5 to 80 MHz.

Source
Description
500 MHz
Sequencer (timing) resolution set to 2ns.
Frequency Synthesizer
Sequencer resolution set to 1 / (2 * FS)
For example, if FS = 100 MHz
    Resolution = 1 / (2 * 100,000,000)
    Resolution = 5ns.

Master Clock Source Settings

See GtDio6xSequencerSetMasterClockSource in the Function Reference section for information.

System Clock 

The System Clock is used to apply Step settings (such as Phase, Window, and T0 Clock) to the sequencer. The System Clock also generates the Vector Clock which is used to define a Vector’s period.

Source
Description
Internal T0 Clock
System Clock driven by the internal T0 Clock which is programmed per Step.
AUX0-AUX11
System Clock driven by the external auxiliary channels.
Frequency Synthesizer
System Clock driven by the internal frequency synthesizer signal.

System Clock Source Settings

The relevant API function is: GtDio6xSequencerSetSystemClockSource.

Vector Clock

The Vector Clock is derived from the System Clock and the Clocks per Vector setting. The Vector Clock period will equal the System Clock Period divided by the Clocks per Vector setting. The Vector Clock is used to clock out Vectors from memory when the Sequencer is running.

See GtDio6xStepSetClock in the functions reference chapter for information.