The Test Logic circuit consists of Control Resources and Triggers which are used to provide the sequencer with testable conditions by which a certain action can be taken.
A Control Resource is a user configurable signal which is tested in the Test Logic block; the results of the test are used by the Sequencer during the execution of the control statement at the end of each Step. There are four selectable Control Resources (0, 1, 2, 3); the following input signal sources can be assigned to any one of the four Control Resources:
· Aux Channels 0 to 11.
· Channel Test 0.
· PXI Trigger 0 to 7.
The Control Resource tests the assigned input signal (the source signal can also be inverted before testing) for one of the following actions:
· Low Level.
· High Level.
· Rising Edge.
· Falling Edge.
The generated Control Resource signal is used in the Step’s control statement as a conditional Boolean to determine if a Jump or Loop should occur.
There is a Reset Mode that controls how and when the Control Resource signal is reset to a low:
· Reset at the start of a Burst.
· Reset at the start of a Step.
· Reset at the start of a Step and when resuming a paused Sequencer.
See GtDio6xTrigConfigSetJumpTrigger for more information.
A Trigger is a user configurable signal which is tested in the Test Logic block; the results of the test are used by the Sequencer during execution to perform an action such as Run, Stop, or Pause. There are three Trigger available:
· Run Trigger.
· Stop Trigger.
· Pause Trigger.
There are several selectable Trigger sources; these source signals can be inverted before being tested. The following input signal sources can be assigned to be a Trigger signal:
· Aux Channels 0 to 11.
· Channel Test 0.
· PXI Trigger 0 to 7.
Once the Trigger source is selected, the Trigger signal can be tested in one of the following ways:
· Low Level.
· High Level.
· Rising Edge.
· Falling Edge.
There is a Reset Mode that controls how and when the Trigger Resource signal is reset to low:
· Reset at the start of a Burst.
· Reset at the start of a Step.
See GtDio6xSetTrigger for more information.
There are 4 Channel Test signals (Channel Test 0 to Channel Test 3) per DIO board.
A Channel Test is a configurable, active-low, signal that evaluates the levels of all I/O Channels of a DIO board against an expected pattern and a mask. If the I/O Channel levels (that are not masked out) match the expected pattern, the Channel Test signal will transition from a high to a low and remain low until the I/O Channel levels no longer match the expected pattern. The Channel Test 0 signal can be used as a source for the Triggers and Control Resource. All Channel Tests can be connected (provide output) to the Auxiliary Channels of a domain.
See GtDio6xSequencerSetChannelsCompareTrigger for more information.