GX5296, GX5961, GX5964, File
Returns a Step’s phase reset source setting
GtDio6xStepGetPhaseTriggerSource (nHandle, lStep, pnPhase0Source, pnPhase1Source, pnPhase2Source, pnPhase3Source, pnStatus)
Name |
Type |
Comments |
nHandle |
SHORT |
Session identifier:● Board handle is used when communicating with the hardware. The Board handle session identifier is returned by calling GtDio6xInitialize or GtDio6xSetupInitialization. ● File handle is used when communicating with a file. The File handle session identifier is returned by calling GtDio6xFileOpen. |
lStep |
LONG |
Step Number to access 0-4095. |
pnPhase0Source |
PSHORT |
Returns the step phase 0 trigger source0. GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK: Step Clock as phase group 0 trigger source. 1. GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK: Vector Clock as phase group 0 trigger source. |
pnPhase1Source |
PSHORT |
Returns the step phase 1 trigger source0. GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK: Step Clock as phase group 1 trigger source. 1. GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK: Vector Clock as phase group 1 trigger source. |
pnPhase2Source |
PSHORT |
Returns the step phase 2 trigger source0. GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK: Step Clock as phase group 2 trigger source.1. GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK: Vector Clock as phase group 2 trigger source. |
pnPhase3Source |
PSHORT |
Returns the step phase 3 trigger source0. GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK: Step Clock as phase group 3 trigger source.1. GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK: Vector Clock as phase group 3 trigger source. |
pnStatus |
PSHORT |
Returned status: 0 on success, negative value on failure. |
Two clocks are available for triggering the timing phases and windows to begin their programmed definition, System Clock and vector Clock. The Clocks per Vector (CPV) determine the number of System Clocks will be generated for each vector Clock. When CPV = 1, then vector Clock is equal to System Clock. When CPV = 2, then vector Clock is two times the System Clock. Each of the four phases can be independently triggered by the System Clock or by the vector Clock.
E.g. if the Clocks per Vector (CPV) is set to 2, and the phase trigger source is set to System Clock, then two phases will be generated desiring each vector, and each vector’s period will be twice the System Clock period.
Note: The window timing logic is only reset with System Clock.
SHORT nPhase0Source, nPhase1Source, nPhase2Source, nPhase3Source;
SHORT nStatus;
GtDio6xStepSetPhaseTriggerSource(nHandle, 5, GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK, GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK, GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK, GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK, &nStatus);
GtDio6xStepGetPhaseTriggerSource(nHandle, 5, &nPhase0Source, &nPhase1Source, &nPhase2Source, &nPhase3Source, &nStatus);
GtDio6xStepSetPhaseTriggerSource, GtDio6xStepSetClock, GtDio6xGetErrorString