GX5296, GX5961, File
Returns an array with Step’s phase reset source setting.
GtDio6xStepGetPhaseTriggerSourceArray (nHandle, lStep, nPhaseSourceCount, panPhaseSourceList, panPhaseSource, pnStatus)
Name |
Type |
Comments |
nHandle |
SHORT |
Session identifier:● Board handle is used when communicating with the hardware. The Board handle session identifier is returned by calling GtDio6xInitialize or GtDio6xSetupInitialization. ● File handle is used when communicating with a file. The File handle session identifier is returned by calling GtDio6xFileOpen. |
lStep |
LONG |
Step Number to access 0-4095. |
nPhaseSourceCount |
SHORT |
Used to specify the step phase source array count. This parameter should be the same size of as panPhaseSourceList, GX5296: Firmware 0xAA03 - phase source array count can be 0 to 3, Firmware 0xAA04 and above - phase source array count can be 0 to 7. GX5960: phase source array count can be 0 to 3 |
panPhaseSourceList |
PSHORT |
Array containing the phase source list. Each index represents a phase number. GX5296: Firmware 0xAA03 - phase source array list can be 0 to 3, Firmware 0xAA04 and above - phase source array list can be 0 to 7. GX5960: phase source array list can be 0 to 3 |
panPhaseSource |
PSHORT |
Array containing the phase source, phase source may be 0 for System Clock, or 1 for Vector Clock |
pnStatus |
PSHORT |
Returned status: 0 on success, negative value on failure. |
Two clocks are available for triggering the timing phases and windows to begin their programmed definition, System Clock and vector Clock. The Clocks per Vector (CPV) determine the number of System Clocks will be generated for each vector Clock. When CPV = 1, then vector Clock is equal to System Clock. When CPV = 2, then vector Clock is two times the System Clock. Each of the four phases (eight phases for GX5296 with firmware 0xAA04 and above) can be independently triggered by the System Clock or by the vector Clock.
E.g. if the Clocks per Vector (CPV) is set to 2, and the phase trigger source is set to System Clock, then two phases will be generated desiring each vector, and each vector’s period will be twice the System Clock period.
Note: The window timing logic is only reset with System Clock.
The following example sets a list of phases 1 to 3 trigger source settings for step 2, and returns the settings:
SHORT nPhaseSourceCount, anPhaseSourceList[3], anPhaseSource[3];
SHORT nPhaseSourceCount, anPhaseSourceListRead[3], anPhaseSourceRead [3];
SHORT nStatus;
nPhaseSourceCount = 3;
anPhaseSourceList[0] = 1; // phase 1 trigger source settings
anPhaseSourceList[1] = 2; // phase 2 trigger source settings
anPhaseSourceList[2] = 3; // phase 3 trigger source settings
anPhaseSource[0] = GTDIO6X_PHASE_TRIGGER_SOURCE_SYSTEM_CLOCK; // phase 1 trigger source is system clock.
anPhaseSource[1] = GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK; // phase 1 trigger source is vector clock.
anPhaseSource[2] = GTDIO6X_PHASE_TRIGGER_SOURCE_VECTOR_CLOCK; // phase 1 trigger source is vector clock.
GtDio6xStepSetPhaseTriggerSourceArray(nHandle, 2, nPhaseSourceCount, anPhaseSourceList, anPhaseSource, &nStatus);
// Read back settings
GtDio6xStepSetPhaseTriggerSourceArray(nHandle, 2, nPhaseSourceCountRead, anPhaseSourceListRead, anPhaseSource, &nStatus);
GtDio6xStepSetPhaseTriggerSourceArray, GtDio6xStepGetPhaseTriggerSource, GtDio6xStepSetClock, GtDio6xGetErrorString