The panel Sequencer tab is used to change the selected GX5961 and GX5964 DIO domain board settings as shown here:
Virtual Panel – Sequencer page
The following controls are shown in the Sequencer page:
Master Clock drop list box: Sets/Displays the master clock source as follows:
0. Internal Clock: Internal 500 MHz clock.
1. Freq Synthesizer: Frequency Synthesizer.
If the Frequency Synthesizer is selected as the master clock source, use GtDio6xSequencerSetFreqSynth to set the clock parameters.
The master clock defines the resolution for the programmable timing generator signals. The following signals have a 1/2 master clock period resolution:
● Timing Set Phases.
● Timing Set Windows.
● Sequence T0CLK.
● External System Clock Offset.
The following signals have master clock period resolution:
● Record Offset.
● Probe Offset.
● Error Pulse Width.
For example, if the master clock is set to internal 500 MHz, then the following resolutions exist: |
If the master clock is set to frequency synthesizer at 200 MHz, then the following resolutions exist: |
||
Signal |
Resolution |
Signal |
Resolution |
Timing Set Phases |
1nS |
Timing Set Phases |
2.5nS |
Timing Set Windows |
1nS |
Timing Set Windows |
2.5nS |
T0CLK |
1nS |
T0CLK |
2.5nS |
System Clock Offset |
1nS |
System Clock Offset |
2.5nS |
Record Offset |
2nS |
Record Offset |
5nS |
Probe Offset |
2nS |
Probe Offset |
5nS |
Error Pulse Width |
2nS |
Error Pulse Width |
5nS |
Relevant API functions: GtDio6xSequencerSetMasterClockSource
System Clock drop list box list box: Sets/Displays the system clock source as follows:
0. T0 Clock: Internal T0 Clock Source.
1. Aux0: Aux 0 signal.
2. Aux1: Aux 0 signal.
3. Aux2: Aux 0 signal.
4. Aux3: Aux 0 signal.
5. Aux4: Aux 0 signal.
6. Aux5: Aux 0 signal.
7. Aux6: Aux 0 signal.
8. Aux7: Aux 0 signal.
9. Aux8: Aux 0 signal.
10. Aux9: Aux 0 signal.
11. Aux10: Aux 0 signal.
12. Aux11: Aux 0 signal.
13. Pulse Gen: Pulse Generator.
14. Freq Synthesizer: Frequency Synthesizer.
The system clock is used to trigger the timing set phase and window logic. The system clock can be set to the following sources:
● Internal T0 Clock Source - The period is defined in the sequence step memory using the GtDio6xStepSetClock function.
● Frequency Synthesizer - The period is defined by the frequency synthesizer settings: GtDio6xSequencerSetFreqSynth.
● AUX0 through AUX11 - The period is defined by the AUX input signal: GtDio6xSequencerSetSystemClockExternal.
A vector clock is also generated from this clock, every 'CPV' system clock periods. CPV (Clocks per vector) is defined in the GtDio6xStepSetClock function. Note, when CPV = 1, then vector clock is equal to system clock. When CPV = 3, then vector clock period is three times the system clock period. Timing set phases can trigger on either system clock or vector clock. Windows only trigger on vector clock.
● Relevant API functions: GtDio6xSequencerSetSystemClockSource.
Halt Mode drop list box list box: Sets/Displays the sequencer Halt mode where execution will halt following either a manual halt (Halt command) or an external trigger as follows:
0. Disabled: Halt Disabled.
1. Vector: Halt the current step at the end of the next vector.
2. Step: Halt the current step at the end of the next vector.
3. Burst: Halt at the end of the current burst loop.
4. Sync1: Halt the current step at the end of the next vector where sync pulse 1 is set.
5. Sync2: Halt the current step at the end of the next vector where sync pulse 2 is set.
6. Vector Error: Halt on Vector Error where a Vector Error occurred, and the vector has its error flag set (Real Time Compare Error). Use GtDio6xWriteVectorTestFlagsMemory API to set the step’s Vector Test Flags Memory.
7. Step Error: Halt at the end of a step where a Vector Error occurred, and the vector has its error flag set (Real Time Compare Error). Use GtDio6xWriteVectorTestFlagsMemory API to set the step’s Vector Test Flags Memory.
8. Burst Error: Halt the current step at the end of the next vector where a Vector Error occurred, and the vector has its error flag set (Real Time Compare Error). Use GtDio6xWriteVectorTestFlagsMemory API to set the step’s Vector Test Flags Memory.
The halt mode determines where execution will halt following either a software generated halt or an external trigger.
Relevant API functions: GtDio6xSequencerSetHaltMode.
System Edge Clock drop list box: Sets/Displays the external system clock edge mode and offset parameters, as follows:
0. None: no signal conditioning.
1. Rising: Use the rising edge of the external signal as the active edge.
2. Falling: Use the falling edge of the external signal as the active edge.
3. Both: Use the rising and falling edge of the external signal as the active edge.
4. RisingDiv2: Use the rising edge of the external signal as the active edge divided by 2.
5. FallingDiv2 Use the falling edge of the external signal as the active edge divided by 2.
The offset allows the user to shift the system clock in order to align the clock/data relationship. The resolution is 1/2 the master clock period.
The clock edge mode is applicable only when the System Clock source is set to any non T0_CLK selection, see GtDio6xSequencerSetSystemClockSource API for details.
Relevant API functions: GtDio6xSequencerSetSystemClockExternal.
Offset (Clks) edit box list box: Sets/Displays the system clock offset (0-65534). The resolution is 1/2 the master clock period.
Relevant API functions: GtDio6xSequencerSetSystemClockExternal.
Stop Mode drop list box: Sets/Displays the sequencer stop mode. The stop mode determines what action a software generated stop or an external trigger will perform as follows:
0. Disabled: Stop Disabled, the stop signal will be ignored.
1. Next Vector: Stop at the next Vector. The stop signal can cause the current sequence's burst to terminate at the end of the next vector.
2. Loop: Break out of loop and continue to the next Step. The stop signal can cause the next jump to be ignored. Sequence execution will continue at the step following the jump step.
3. Step: Stop at the next Step. The stop signal can cause the current sequence's burst to terminate at the end of the sequence of a continuous or looped burst.
The stop modes determine if and how the sequencer will stop once it receives either a software or hardware stop command.
The GtDio6xTrigConfigSetStopTrigger API causes the sequencer to stop based on the current stop mode. Use the GtDio6xSequencerSetStopMode API to program the stop mode.
The GtDio6xSequencerStop API stops the sequencer based on the GtDio6xSequencerSetStopMode API selection. The sequencer standby or idle state will be active based on the GtDio6xSequencerSetRunCompletionMode API setting.
Note: calling GtDio6xSequencerStop API when the sequencer is not active latches the GtDio6xTrigConfigSetStopTrigger command until the sequencer is active.
Relevant API functions: GtDio6xSequencerSetStopMode.
Loop Counter drop list box: Sets/Displays the loop counter number as follows:
0. Loop Counter 0.
1. Loop Counter 1.
2. Loop Counter 2.
3. Loop Counter 3.
4. Loop Counter 4.
5. Loop Counter 5.
6. Loop Counter 6.
7. Loop Counter 7.
8. Loop Counter 8.
9. Loop Counter 9.
10. Loop Counter 10.
11. Loop Counter 11.
12. Loop Counter 12.
13. Loop Counter 13.
14. Loop Counter 14.
15. Loop Counter 15.
There are sixteen 16-bit loop counters. Each of the sixteen loop counters can be programmed to either reload its count or disable when the terminal count is reached.
For example, given the following sample loop sequence:
Step 1 Output vector 1 jump step 1 using LC0 count 2.
Step 2 Output vector 2 jump step 1 using LC1 count 3.
If both loop counters reload on terminal count, then the step order will be: 1, 1, 2, 1, 1, 2, 1, 1, 2, 1, 1, 2.
If counter 0 is set to disable, then the step order will be: 1, 1, 2, 1, 2, 1, 2, 1, 2.
Relevant API functions: GtDio6xSequencerSetLoopCounterMode.
Mode drop list box: Sets/Displays the loop counter mode, as follows:
0. Reload On Terminal Count: Reload on terminal count.
1. Disable On Terminal Count: Disable on terminal count.
There are sixteen 16-bit loop counters. Each of the sixteen loop counters can be programmed to either reload its count or disable when the terminal count is reached.
For example, given the following sample loop sequence:
Step 1 Output vector 1 jump step 1 using LC0 count 2.
Step 2 Output vector 2 jump step 1 using LC1 count 3.
If both loop counters reload on terminal count, then the step order will be: 1, 1, 2, 1, 1, 2, 1, 1, 2, 1, 1, 2.
If counter 0 is set to disable, then the step order will be: 1, 1, 2, 1, 2, 1, 2, 1, 2.
Relevant API functions: GtDio6xSequencerSetLoopCounterMode.
Record Mode drop list box: Sets/Displays the sequencer record parameters.
Sets the sequencer record mode. The sequencer record mode is used to select how the record memory is accessed when the sequence step disables the memory, values are:
0. Disabled: The contents of the record memory are unchanged when the step record mode is set to None (GTDIO6X_STEP_RECORD_MODE_DISABLED) or Count (GTDIO6X_STEP_RECORD_MODE_RTC_COUNT_ADDRESS), then the record memory will not be written to.
1. Non-Error (0): The contents of the record memory are set to 0 (No Error) when the step record mode is set to None (GTDIO6X_STEP_RECORD_MODE_DISABLED) or Count (GTDIO6X_STEP_RECORD_MODE_RTC_COUNT_ADDRESS), then the record memory will not be written to.
The record mode is set for each step using the GtDio6xStepSetRecordMode function.
The Record Offset should be set to approximately 20-30 master clock periods to compensate for internal system delay.
Relevant API functions: GtDio6xSequencerSetRecordParameters.
Frequency Synthesizer group box:
Ref Source drop list box: Sets/Displays the frequency synthesizer clock source as follows:
Internal: Internal 500 MHz clock.
0. Aux0: External AUX0 channel as clock source.
1. Aux1: External AUX1 channel as clock source.
2. Aux2: External AUX2 channel as clock source.
3. Aux3: External AUX3 channel as clock source.
4. Aux4: External AUX4 channel as clock source.
5. Aux5: External AUX5 channel as clock source.
6. Aux6: External AUX6 channel as clock source.
7. Aux7: External AUX7 channel as clock source.
8. Aux8: External AUX8 channel as clock source.
9. Aux9: External AUX9 channel as clock source.
10. Aux10: External AUX10 channel as clock source.
11. Aux11: External AUX11 channel as clock source.
12. PXI Clock: PXI 10MHz clock as clock source.
The frequency synthesizer can be used as the "Master Clock" source, the "System Clock" source or it can simply be output through any of the front panel AUX signals.
Programming the frequency synthesizer consists of three settings,
1. Output Frequency.
2. Reference Source.
3. Reference Frequency.
The output frequency can be from 40 to 500 MHz, a value of zero disables the frequency synthesizer. The reference source can be set to an internal 20 MHz clock, the PXICLK10 signal or any of the front panel AUX signals. The reference frequency is only required if the reference source is set to one of the AUX signals. The "Internal" reference is a fixed 20 MHz, the PXICLK10 is a fixed 10 MHz. This value is required in order to determine the feedback divider values for the frequency generator.
Relevant API functions: GtDio6xSequencerSetFreqSynth.
Ref (MHz) edit box: Sets/Displays Sets the synthesizer reference clock frequency within a range of 5 MHz-80 MHz (5-80).
Relevant API functions: GtDio6xSequencerSetFreqSynth.
Freq (MHz) edit box: Sets/Displays the synthesizer frequency within the range of 40 MHz to 500 MHz (40-500).
Relevant API functions: GtDio6xSequencerSetFreqSynth.
Data Mode drop list box: Sets/displays the probe’s data mode. The probe data mode controls the writing of probe results into the probe data memory. If disabled, the probe data memory is not written to. If enabled, the probe results are written to the probe data memory at the end of each vector, values are:
● Disable.
● Enable.
Relevant API functions: GtDio6xProbeSetDataMode.
CRC Capture drop list: Sets/displays the probe CRC mode, values are:
● Disable: Disable CRC capture.
● Rising Edge: Capture CRC on Window 4 Rising Edge.
● Falling Edge: Capture CRC on Window 4 Falling Edge.
Relevant API functions: GtDio6xProbeSetParameters.
Offset edit box: Sets/displays the amount, in terms of Master Clock Cycles, that the probe record signals have been offset. The range of values is 0-15.
Relevant API functions: GtDio6xProbeSetParameters.
LED drop list: Sets/display the probe Led Enable setting, values are:
● Disable: Probe Data Memory is not written.
● Enable: Probe Data Memory will be written to at the end of each vector.
Relevant API functions: GtDio6xProbeSetParameters.
Sync Pulse group box:
Select drop list: Sets/displays the sequencer sync Sync Output Signal to set, values are:
● One: First sequencer sync output signal.
● Two: Second sequencer sync output signal.
Relevant API functions: GtDio6xSequencerSetSyncPulseSource.
Start drop list: Sets/displays the sync output’s event mode, values are:
● Burst: The sync pulse begins from the start of the burst.
● Step: The sync pulse begins from the specified step number.
Relevant API functions: GtDio6xSequencerSetSyncPulseSource.
Length edit box: Sets/displays the sync vector length. The resolution is in vector clocks. The valid range of values are 0-4095.
Relevant API functions: GtDio6xSequencerSetSyncPulseParameters.
Step edit box: Sets/displays the sequence step number that is associated with the sync output.
Relevant API functions: GtDio6xSequencerSetSyncPulseParameters.
Vector edit box: Sets/displays the sequence step number that is associated with the sync output.
Relevant API functions: GtDio6xProbeSetParameters.