GX1632e Arbitrary Waveform Generation

The GX1632e feature two mechanisms for Arbitrary Waveform Generation.  If the data in a pattern is known completely before the waveform is needed, the data can be loaded to a RAM.  When triggered, will continuously output the data looping through the samples until the waveform generator is disarmed. If the data in the pattern is generated ‘on-the-fly’ or if the RAM is too small to fit all of the data at once, the streaming option is a better option and the on-board FIFO will be used to stream the waveform.

Fixed Waveform Generation

The following figure shows loading a waveform to the RAM:

GX1632e Waveform Generation

The 8GB RAM is divided into 64 kB ‘buckets’. During the setup phase of waveform generation, a corresponding bucket within your PCs RAM is allocation and the two memory regions are linked for DMA data transmission during the streaming phase. These buckets contain 16384 samples or 16kS. Each group is allocated its own buckets and can be allocation any power of 2, up to 128: 1, 2, 4, 8, 16, 32, 64, or 128. Once streaming begins, you must update all of your allocated buckets to receive an interrupt.

Streaming Waveform Generation

The following figure shows streaming a waveform:

GX1632e Streaming Waveform Generation

DMA Memory Allocation

When using HW 4.9.7 or newerr versions, DMA buffers allocated to PXI instruments is automatically set to 8 segments.  To utilize the full functionality of the GX1632e, this allocation should be set to 256.  If the allocation is insufficient, you may receive an error with the following code and description:

"-45, Unable to allocate DMA physical memory"

To change the memory allocation:

Domain Synchronization

By default, a board uses an internal clock generated by dividing the 100 MHz PXIe clock signal.  GX1632e can have their waveform generation synchronized by switching this to utilize another external clock source.  Available external clock signals include the PXI trigger bus lines, the PXI STAR trigger, PXIe STAR A or STAR B, or one of the DIO channels accessible from the GX1632e front connector. (GxAoArbSetGroupClockEx).

When a card is configured in the leader role, it will output a pulse on the specified signal line while the Arb is streaming.  Available output sources are PXI trigger lines, the PXI STAR trigger line or the PXIe STAR C trigger line.  By synchronizing followers to different clock sources and using leader boards to generate signals on different bus lines, you can create multiple parallel domains of GX1632Es. (GxAoArbSetGroupClockRole).