TANGO Test Log


Company : THALES AIR DEFENCE
Project : TANGO Aquila Test Bench
Program : STAR_DG_NR_TEST
Serial Number : 3
Start Time : 12/13/13   16:46:14

Task 1 : CKTST 1 : VISUAL INSPECTION

# Name Pin - Value - Result Status
001 test 1_1 : external check - "Correct" - "Correct" Pass

Task 2 : CKTST 2 : POWER SUPPLY TEST

# Name Pin Unit Min Max Result Status
001 test 2_1 : +5 V voltage short circuit P1-36/P1-37 Ohm 300.000 359.802 Pass
002 test 2_2 : +15 V voltage short circuit P1-40/P1-41 Ohm 300.000 388.224 Pass
003 test 2_3 : -5,2 V voltage short circuit P1-46/P1-47 Ohm 30000.000 33407.480 Pass
# Name Pin Unit Tolerence Value Result Status
004 test 2_4 : +5 V current level P1-36/P1-37 Amp +/ -0.300 0.900 1.060 Pass
005 test 2_5 : +15 V current level P1-40/P1-41 Amp +/ -0.100 0.531 0.556 Pass
006 test 2_6 : -5,2 V current level P1-46/P1-47 Amp +/ -0.050 0.153 0.167 Pass
007 test 2_7 : +5 V power supply voltage P1-36/P1-37 Volt +/ -0.250 5.000 5.241 Pass
008 test 2_8 : +15 V power supply voltage P1-40/P1-41 Volt +/ -0.750 15.000 15.204 Pass
009 test 2_9 : -5,2 V power supply voltage P1-46/P1-47 Volt +/ -0.250 -5.200 -5.190 Pass

Task 3 : CKTST 3 : J3, J4, J7 AND J9 OUTPUT TEST

# Name Pin Unit Tolerence Value Result Status
001 test 3_1A : J3 (H30_REF_1) output power test J3 dBm +/ -1.000 2.000 1.967 Pass
002 test 3_1B : J3 (H30_REF_1) frequency test J3 MHZ +/ -0.100 31.080 31.080 Pass
003 test 3_2A : J4 (H30_REF_2) output power test J4 dBm +/ -1.000 10.000 9.995 Pass
004 test 3_2B : J4 (H30_REF_2) frequency test J4 MHZ +/ -0.100 31.080 31.080 Pass
# Name Pin Unit Min Max Result Status
005 test 3_3A1 : J7 (HCD_RES) output clock TTL high level test J7 Volt 1.600 2.570 Pass
006 test 3_3A2 : J7 (HCD_RES) output clock TTL low level test J7 Volt 0.800 0.060 Pass
# Name Pin Unit Tolerence Value Result Status
007 test 3_3B : J7 (HCD_RES) frequency test J7 MHZ +/ -0.100 1.295 1.295 Pass
# Name Pin Unit Min Max Result Status
008 test 3_4A1 : J9 (H20_RES_OUT) output clock TTL high level test J9 Volt 1.600 4.280 Pass
009 test 3_4A2 : J9 (H20_RES_OUT) output clock TTL low level test J9 Volt 0.800 0.030 Pass
# Name Pin Unit Tolerence Value Result Status
010 test 3_4B : J9 (H20_RES_OUT) frequency test J9 MHZ +/ -0.100 20.720 20.715 Pass
011 test 3_5 : J7 (HCD_RES_OUT) output clock delay test J7 uSec +/ -0.150 1.500 1.454 Pass
012 test 3_6 : J9 (H20_RES_OUT) output clock delay test J9 nSec +/ -70.000 720.000 720.000 Pass

Task 4 : CKTST 4 : Sy0 OUTPUT TEST

# Name Pin Unit Tolerence Value Result Status
008 test 4_6A : Sy0 duration(with bus-ci = 05 H) P1-1 uSec +/ -0.100 98.336 98.535 Fail*
011 test 4_8A : Sy0 duration(with bus-ci = 07 H) P1-1 uSec +/ -0.100 75.336 75.341 Pass
012 test 4_8B : Sy0 delay from SYGENE(with bus-ci = 07 H) P1-1 uSec +/ -0.050 0.190 0.227 Pass

Task 4 : CKTST 4 : Sy0 OUTPUT TEST

# Name Pin Unit Min Max Result Status
001 test 4_1A : Sy0 duration(with bus-ci = 00 H) P1-1 0.000 0.000 0.000 Pass
# Name Pin Unit Tolerence Value Result Status
002 test 4_2A : Sy0 duration(with bus-ci = 01 H) P1-1 uSec +/ -0.100 1.496 1.464 Pass
003 test 4_2B: Sy0 delay from SYGENE(with bus-ci = 01 H) P1-1 uSec +/ -0.050 0.190 0.252 Fail*

...Application aborted.



... PROGRAM ABORTED ...