TANGO
Test Log
|
Company |
: THALES AIR DEFENCE |
|
|
Project |
: TANGO Aquila Test Bench |
|
|
Program |
: STAR_DG_NR_TEST 47 068
402 |
|
|
Serial Number |
: 5 |
|
|
Start Time |
:
12/13/13 10:45:05 |
Task 1 : CKTST 1 :
VISUAL INSPECTION
|
# |
Name |
Pin |
- |
Value |
- |
Result |
Status |
|
001 |
test 1_1 : external check |
- |
"Correct" |
- |
"Correct" |
Pass |
Task 2 : CKTST 2 :
POWER SUPPLY TEST
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
001 |
test 2_1 : +5 V voltage short
circuit |
P1-36/P1-37 |
Ohm |
300.000 |
358.282 |
Pass |
|
002 |
test 2_2 : +15 V voltage short
circuit |
P1-40/P1-41 |
Ohm |
300.000 |
385.465 |
Pass |
|
003 |
test 2_3 : -5,2 V voltage short
circuit |
P1-46/P1-47 |
Ohm |
30000.000 |
33293.250 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
004 |
test 2_4 : +5 V current level |
P1-36/P1-37 |
Amp |
+/ -0.300 |
0.900 |
1.055 |
Pass |
|
005 |
test 2_5 : +15 V current level |
P1-40/P1-41 |
Amp |
+/ -0.100 |
0.531 |
0.550 |
Pass |
|
006 |
test 2_6 : -5,2 V current level |
P1-46/P1-47 |
Amp |
+/ -0.050 |
0.153 |
0.161 |
Pass |
|
007 |
test 2_7 : +5 V power supply
voltage |
P1-36/P1-37 |
Volt |
+/ -0.250 |
5.000 |
5.241 |
Pass |
|
008 |
test 2_8 : +15 V power supply
voltage |
P1-40/P1-41 |
Volt |
+/ -0.750 |
15.000 |
15.205 |
Pass |
|
009 |
test 2_9 : -5,2 V power supply
voltage |
P1-46/P1-47 |
Volt |
+/ -0.250 |
-5.200 |
-5.190 |
Pass |
Task 3 : CKTST 3 :
J3, J4, J7 AND J9 OUTPUT TEST
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
001 |
test 3_1A : J3 (H30_REF_1) output
power test |
J3 |
dBm |
+/ -1.000 |
2.000 |
2.792 |
Pass |
|
002 |
test 3_1B : J3 (H30_REF_1)
frequency test |
J3 |
MHZ |
+/ -0.100 |
31.080 |
31.080 |
Pass |
|
003 |
test 3_2A : J4 (H30_REF_2) output
power test |
J4 |
dBm |
+/ -1.000 |
10.000 |
9.946 |
Pass |
|
004 |
test 3_2B : J4 (H30_REF_2)
frequency test |
J4 |
MHZ |
+/ -0.100 |
31.080 |
31.079 |
Pass |
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
005 |
test 3_3A1 : J7 (HCD_RES) output
clock TTL high level test |
J7 |
Volt |
1.600 |
2.670 |
Pass |
|
006 |
test 3_3A2 : J7 (HCD_RES) output
clock TTL low level test |
J7 |
Volt |
0.800 |
0.090 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
007 |
test 3_3B : J7 (HCD_RES) frequency
test |
J7 |
MHZ |
+/ -0.100 |
1.295 |
1.295 |
Pass |
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
008 |
test 3_4A1 : J9 (H20_RES_OUT)
output clock TTL high level test |
J9 |
Volt |
1.600 |
4.350 |
Pass |
|
009 |
test 3_4A2 : J9 (H20_RES_OUT)
output clock TTL low level test |
J9 |
Volt |
0.800 |
0.000 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
010 |
test 3_4B : J9 (H20_RES_OUT)
frequency test |
J9 |
MHZ |
+/ -0.100 |
20.720 |
20.715 |
Pass |
|
011 |
test 3_5 : J7 (HCD_RES_OUT) output
clock delay test |
J7 |
uSec |
+/ -0.150 |
1.500 |
1.480 |
Pass |
|
012 |
test 3_6 : J9 (H20_RES_OUT) output
clock delay test |
J9 |
nSec |
+/ -70.000 |
720.000 |
727.270 |
Pass |
Task 4 : CKTST 4 :
Sy0 OUTPUT TEST
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
001 |
test 4_1A : Sy0 duration(with
bus-ci = 00 H) |
P1-1 |
0.000 |
0.000 |
0.000 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
002 |
test 4_2A : Sy0 duration(with
bus-ci = 01 H) |
P1-1 |
uSec |
+/ -0.100 |
1.496 |
1.500 |
Pass |
|
003 |
test 4_2B: Sy0 delay from
SYGENE(with bus-ci = 01 H) |
P1-1 |
uSec |
+/ -0.050 |
0.190 |
0.228 |
Pass |
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
004 |
test 4_3A : Sy0 duration(with
bus-ci = 02 H) |
P1-1 |
uSec |
0.000 |
0.000 |
0.000 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
005 |
test 4_4A : Sy0 duration(with
bus-ci = 03 H) |
P1-1 |
uSec |
+/ -0.100 |
75.336 |
75.345 |
Pass |
|
006 |
test 4_4B: Sy0 delay from
SYGENE(with bus-ci = 03 H) |
P1-1 |
uSec |
+/ -0.050 |
0.190 |
0.227 |
Pass |
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
007 |
test 4_5A : Sy0 duration(with
bus-ci = 04 H) |
P1-1 |
uSec |
0.000 |
0.000 |
0.000 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
008 |
test 4_6A : Sy0 duration(with
bus-ci = 05 H) |
P1-1 |
uSec |
+/ -0.100 |
98.336 |
98.393 |
Pass |
|
009 |
test 4_6B: Sy0 delay from
SYGENE(with bus-ci = 05 H) |
P1-1 |
uSec |
+/ -0.050 |
0.190 |
0.226 |
Pass |
|
# |
Name |
Pin |
Unit |
Min |
Max |
Result |
Status |
|
010 |
test 4_7A: Sy0 duration(with
bus-ci = 06 H) |
P1-1 |
uSec |
0.000 |
0.000 |
0.000 |
Pass |
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
011 |
test 4_8A : Sy0 duration(with
bus-ci = 07 H) |
P1-1 |
uSec |
+/ -0.100 |
75.336 |
75.333 |
Pass |
|
012 |
test 4_8B : Sy0 delay from
SYGENE(with bus-ci = 07 H) |
P1-1 |
uSec |
+/ -0.050 |
0.190 |
0.226 |
Pass |
Task 4 : CKTST 4 :
Sy0 OUTPUT TEST
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
011 |
test 4_8A : Sy0 duration(with
bus-ci = 07 H) |
P1-1 |
uSec |
+/ -0.100 |
75.336 |
75.343 |
Pass |
|
012 |
test 4_8B : Sy0 delay from
SYGENE(with bus-ci = 07 H) |
P1-1 |
uSec |
+/ -0.050 |
0.190 |
0.225 |
Pass |
Task 5 : CKTST 5 :
EXTERNAL PHASE TEST
|
# |
Name |
Pin |
- |
Value |
- |
Result |
Status |
|
001 |
test 5_1 : J35 output external
phase test (ci=07,without accumulation) |
J35 |
- |
"Correct" |
- |
"Correct" |
Pass |
|
002 |
test 5_2 : J35 output external
phase test (ci=07,with accumulation) |
J35 |
- |
"Correct" |
- |
"Correct" |
Pass |
|
003 |
test 5_3 : J35 output external
phase test (ci=06,without accumulation) |
J35 |
- |
"Correct" |
- |
"Correct" |
Pass |
|
004 |
test 5_4 : J35 output external
phase test (ci=06,with accumulation) |
J35 |
- |
"Correct" |
- |
"Correct" |
Pass |
Task 6 : CKTST 6:
IMPULSE TIMAL TEST
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
001 |
test 6_1A : J1 output signal
DURATION test (with bus-ci = 00 H) |
J1 |
uSec |
+/ -0.100 |
1.000 |
0.942 |
Pass |
|
002 |
test 6_1B : J1 output signal DELAY
test (with bus-ci = 00 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.527 |
Fail* |
|
003 |
test 6_2A : J1 output signal
DURATION test (with bus-ci = 01 H) |
J1 |
uSec |
+/ -0.100 |
1.700 |
1.749 |
Pass |
|
004 |
test 6_2B : J1 output signal DELAY
test (with bus-ci = 01 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.817 |
Fail* |
|
005 |
test 6_3A : J1 output signal
DURATION test (with bus-ci = 02 H) |
J1 |
uSec |
+/ -0.100 |
3.090 |
3.055 |
Pass |
|
006 |
test 6_3B : J1 output signal DELAY
test (with bus-ci = 02 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.434 |
Fail* |
|
007 |
test 6_4A : J1 output signal
DURATION test (with bus-ci = 03 H) |
J1 |
uSec |
+/ -0.200 |
75.600 |
75.566 |
Pass |
|
008 |
test 6_4B : J1 output signal DELAY
test (with bus-ci = 03 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.708 |
Fail* |
|
009 |
test 6_5A: J1 output signal
DURATION test (with bus-ci = 04 H) |
J1 |
uSec |
+/ -0.200 |
74.900 |
74.893 |
Pass |
|
010 |
test 6_5B: J1 output signal DELAY
test (with bus-ci = 04 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.436 |
Fail* |
|
011 |
test 6_6A : J1 output signal
DURATION test (with bus-ci = 05 H) |
J1 |
uSec |
+/ -0.200 |
98.600 |
98.599 |
Pass |
|
012 |
test 6_6B : J1 output signal DELAY
test (with bus-ci = 05 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.703 |
Fail* |
|
013 |
test 6_7A : J1 output signal
DURATION test (with bus-ci = 06 H) |
J1 |
uSec |
+/ -0.200 |
97.900 |
97.869 |
Pass |
|
014 |
test 6_7B : J1 output signal DELAY
test (with bus-ci = 06 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.415 |
Pass |
|
015 |
test 6_8A : J1 output signal
DURATION test (with bus-ci = 07 H) |
J1 |
uSec |
+/ -0.200 |
75.600 |
75.621 |
Pass |
|
016 |
test 6_8B : J1 output signal DELAY
test (with bus-ci = 07 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.691 |
Pass |
Task 6 : CKTST 6:
IMPULSE TIMAL TEST
|
# |
Name |
Pin |
Unit |
Tolerence |
Value |
Result |
Status |
|
001 |
test 6_1A : J1 output signal
DURATION test (with bus-ci = 00 H) |
J1 |
uSec |
+/ -0.100 |
1.000 |
1.004 |
Pass |
|
002 |
test 6_1B : J1 output signal DELAY
test (with bus-ci = 00 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.400 |
Pass |
|
003 |
test 6_2A : J1 output signal
DURATION test (with bus-ci = 01 H) |
J1 |
uSec |
+/ -0.100 |
1.700 |
1.680 |
Pass |
|
004 |
test 6_2B : J1 output signal DELAY
test (with bus-ci = 01 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.689 |
Pass |
|
005 |
test 6_3A : J1 output signal
DURATION test (with bus-ci = 02 H) |
J1 |
uSec |
+/ -0.100 |
3.090 |
3.100 |
Pass |
|
006 |
test 6_3B : J1 output signal DELAY
test (with bus-ci = 02 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.394 |
Pass |
|
007 |
test 6_4A : J1 output signal
DURATION test (with bus-ci = 03 H) |
J1 |
uSec |
+/ -0.200 |
75.600 |
75.566 |
Pass |
|
008 |
test 6_4B : J1 output signal DELAY
test (with bus-ci = 03 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.672 |
Pass |
|
009 |
test 6_5A: J1 output signal
DURATION test (with bus-ci = 04 H) |
J1 |
uSec |
+/ -0.200 |
74.900 |
74.893 |
Pass |
|
010 |
test 6_5B: J1 output signal DELAY
test (with bus-ci = 04 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.400 |
Pass |
|
011 |
test 6_6A : J1 output signal
DURATION test (with bus-ci = 05 H) |
J1 |
uSec |
+/ -0.200 |
98.600 |
98.599 |
Pass |
|
012 |
test 6_6B : J1 output signal DELAY
test (with bus-ci = 05 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.667 |
Pass |
|
013 |
test 6_7A : J1 output signal
DURATION test (with bus-ci = 06 H) |
J1 |
uSec |
+/ -0.200 |
97.900 |
97.869 |
Pass |
|
014 |
test 6_7B : J1 output signal DELAY
test (with bus-ci = 06 H) |
J1 |
uSec |
+/ -0.050 |
1.380 |
1.404 |
Pass |
|
015 |
test 6_8A : J1 output signal
DURATION test (with bus-ci = 07 H) |
J1 |
uSec |
+/ -0.200 |
75.600 |
75.621 |
Pass |
|
016 |
test 6_8B : J1 output signal DELAY
test (with bus-ci = 07 H) |
J1 |
uSec |
+/ -0.050 |
5.650 |
5.691 |
Pass |