An I/O pin uses one channel. Up to eight boards can be used in one domain for a maximum of 256 pins (each board containing 32 I/O pins).
I/O Pin Block Diagram
the figure Clock Source Block Diagram is a simplified block diagram of a single I/O pin. This diagram shows how a single channel functions. Output data is stored in the output memory and is outputted from the board as a function of the CLK signal through an output buffer when enabled. When defining the channel a Input, the channel value is latched by the Strobe signal into the input buffer and stored in the input memory.
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Note: Whenever a group of channels is defined as Output for a specified step, the value of that group step will be latched into the In Memory while running. |
The direction of the I/O pins (input/output) depends on the output Control State. In addition, each output (driver) defined pin is also an input (receiver). The software can ignore the received data; however, its value in the input memory will be the same as the output value.