Marvin Test Solutions’s DIO is a family of high-speed, programmable, dynamic Digital Input and Output (I/O) boards. These boards perform high-speed automated functional testing, device testing, simulation and data acquisition. The DIO family provides real-time digital pattern capture and generation, with 32 channels per card and up to 8 cards or 256 channels per system.
The DIO family uses common software development tools to develop test vector files. The test vector files contain digital patterns sent to or received from the Unit Under Test (UUT).
Development of the vector file may be independent of the hardware with DIOEasy. Vector file verification requires the DIO be installed and properly configured.
Marvin Test Solutions bundles DIOEasy with all DIO products. DIOEasy, Marvin Test Solutions’s vector development and analysis software, allows manual control of the DIO hardware using the built-in DIO Virtual Instrument Panel. The DIO driver permits control of the DIO family from common software development tools such as ATEasy, Visual Basic, C, C++, Pascal and more.
DIOEasy is a 32-bit Windows application not requiring any programming experience or knowledge.
The DIO Driver and DIOEasy software control the DIO boards. Effective use of the driver requires an understanding of how DIO boards are used in a system and board capability.
Marvin Test Solutions offers two families of DIO boards:
● GT25/50-DIO series.
● GT515x (see the DIO GT5150/5151 Dynamic Digital I/O User's Guide).
Common Elements
Both families use a Master DIO board to establish synchronization with the UUT and provide timing signals to the Master and other (Slave) boards. The DIO Master also has a Timing and Control Module. This module mounts on the Master. Signals from the timing module provide control and synchronization to the Master’s I/O Module and up to seven Slave I/O Modules. Every DIO configuration needs at least one Master board and can control up to 256 digital input or output channels.
Both families support Slave boards, extending the number of UUT I/O channels while maintaining the same timing and pattern sequencing. However, the Slave boards must be of the same family as the Master board.
The Driver and DIOEasy application are common to both families.
GT25/50-DIO Series
The GT25/50-DIO has 32 channels of I/O. The direction of GT25/50 channels can be switched dynamically from Input to Output at each vector step (in groups of eight channels). The GT25/50 has only TTL levels but can support other levels using GT515x I/O modules mounted on a GT5900.
GT515x Series
The GT515x has 8, 16 or 32 channels (programmable width). Each channel can be preprogrammed as Input or as Output, although the direction applies to the entire board and cannot be changed dynamically (while the test vector is running). Memory depth of the GT515x increases proportionately as width is reduced (that is, 32Mbit per channel with a width of 32 channels, 64Mbit per channel with a width of 16 channels or 128Mbit per channel with a width of 8 channels). The GT515x can use a variety of I/O modules to interface with different UUTs. Those I/O modules expand the DIO abilities, including interfacing with different voltage levels, providing higher speed and comparing data on the fly.
The GT5900 is a carrier board for GT515x I/O modules. This board is used typically with the GT25/50 when special I/O modules are required. The GT5900 can carry two I/O modules or one I/O module and a Timing Control module.
The family architectures are different and so are their capabilities. Some driver functions are available only to a specific family while others will work with both families.
The DIO Driver accesses Master, Slave and carrier boards through the computer’s bus (the figure below). The driver can accommodate up to 16 Masters (from either family). All DIO and carrier boards have switches used to assign I/O addresses. Each board must have a unique I/O address. Board addresses then are saved in a database through a driver library function call or the Panel’s “Configure!” button.
A DIO domain has one Master DIO board and up to seven Slave DIO boards. The Master, its Slaves, carriers and related modules comprise a DIO domain. The figure below shows a domain from two different families on a PC bus.
Two Different DIO Domains on One PC Bus
Domains are internally synchronized and controlled through a Timing cable binding the Master’s Timing module to all domain Slave boards. To synchronize a domain with a UUT, you need to synchronize the Master board’s Timing module.
Masters and Slaves within a domain must be members of the same product family. Each Slave adds 32 additional UUT I/O channels. Up to seven Slaves can be added to a domain.
A full domain, containing eight DIO boards, provides up to 256 UUT I/O channels (256 channels wide). Because the driver supports 16 Masters, up to 16 domains of mixed types can, in principle, share a PC bus. Realistically, only two DIO domains (16 cards, 512 channels) can exist in an industrial PC due to slot and I/O address
limitations. Using Marvin Test Solutions’s GTXI instrument control chassis (which can accommodate up to 52 instruments and has expanded I/O addressing), up to six DIO domains (48 boards, 1536 channels) can be used in a single system. The actual limit is subject to slot and possible I/O address availability. Each DIO Master board can serve an independent UUT time source.
A minimum DIO domain contains only a Master DIO board (32 digital channels).
The following are key GT25/50-DIO characteristics and architecture elements:
● A GT25/50-DIO domain can contain one or more GT25/50 DIO boards.
● A GT25/50-DIO Master board controls the timing of a DIO domain and can be synchronized to a UUT.
● A Master board can be added to synchronize an additional asynchronous UUT element.
● A GT25/50-DIO Slave board adds 32 UUT channels. Up to 7 Slave boards can be added for 256 channels.
● DIO boards can support non-TTL interfaces by adding a GT5900 Carrier with appropriate I/O Modules mounted on it.
● Channel direction is controlled in-groups of eight. Direction can be switched on the fly between input and output via program control.
● Memory can differ among domain boards. The board with the lowest capacity memory limits available program steps (depth). The user must assure enough memory exists to run the vector file and acquire results.
● Registers A, B, C, D, P and T can be loaded and compared against external events on the External Event line.
● UUTs can generate triggers on External Event lines. D and T Event Registers can be compared after masking events with loadable D and T Mask Registers.
● External triggering can be initiated on sequential or concurrent events using both D and T Event Registers to define the events.
● The test program can be paused with or without conditions, based on external events. The P Event and P Mask Registers hold the condition and bits generating a conditional pause.
● A more thorough discussion of board architecture, including a block diagram, is found in the GT25/50-DIO User's Guide - Theory Of Operation - Architecture