Input data is availability depends on the configuration of the UUT and DIO board. In loop back mode, the data is synchronized, and there is no beginning step discrepancy. When using asynchronous external trigger (XTRIG) to start the capture event, there can be 2-3 clocks latency. If XTRIG and external clock (XCLK) are synchronous, then the delay can be held to 2 steps. In general, trigger conditions add additional clock latency. Depend on the frequency, where the data resides in relation to the address and the strobe window, data may be skewed by +/- a clock by varying the strobe delay value.
Output data is clocked into registers before the output buffers. Therefore, output data is present one clock after the data is presented from the memory. In the case of a PAUSE condition, this means that if a PAUSE occurs at address 0x100, the data presented on the outputs (if held), is the data at 0x100 in memory. However, the counter address will now be at 0x101.
It is important to account for time delay when analyzing data, such as when comparing input data with its expected value.
Typically, input data is captured and saved in a DI file. A DIO file that contains expected inputs is created for comparison. When analyzing received data records, the two files can be compared using the DIOEasy file compare feature, driver functions or other analysis methods.
Data will not compare properly unless the generated data is offset by a number of steps corresponding to the strobe delay. The strobe can be the same as the clock, in which case the delay is one step. The strobe can be a clock count down; in which case the delay will be 2 or more clocks.
If the GT5920 (Frequency Doubler) I/O Module is used, there is an additional input delay of three sequencer clocks.
The strobe must be synchronous with the clock for a file comparison to succeed.
DIO output data is not normally affected by delay because it is clocked and the clock follows the strobe signal (see figure GT5150 Operational States). Therefore, the output occurs exactly at the programmed step.
If the GT5920 I/O Module is used, then there is an additional output delay of three sequencer clocks.