The GX5960 provides a robust sequencing engine that can evaluate a variety of input signals to control overall pattern branching and sequencer state. The Test Logic circuit functions to capture signals such as Real Time Compare Error, Channel Test, and/or Auxiliary Channel Input and use them to enable sequence jumps, and to run/stop/pause the pattern sequencer. The Channel Test circuit, in particular, is designed to detect a user specified expect pattern on the I/O channels and signal the Test Logic to take action.
The Test Logic takes these input signals, applies an optional signal inversion (if specified), and specific test criteria, such as edge/level testing, in order to drive the sequence controller.
This article focuses on explaining the usage and set up of the Channel Test signal (ERR/CH TEST) and routing the signal to the Test Logic in order to trigger the sequencer to enter the Run state.
The Channel Test signal is generated by sampling one or more I/O channels (specified by a mask) and comparing their logic levels with expect data. If the sampled data matches the expect data, the Channel Test signal will be driven Low (active Low). The Channel Test samples the I/O channels continuously and is generated through combinational logic. The output of the Channel Test combinational logic is one of many signals that can be used within the Test Logic to execute a desired action (jump, run, halt, pause…). A 32 bit mask is used to specify which I/O channel(s) are of interest (for example a mask set to 0xFFFF0000 will cause the Channel Test to only care about I/O channels 16-31).
All set up of the Test Logic (signal selection, selection, and test mode) and configuration of the Channel Test signal (expect and mask data) can be done through the software API as shown at the end of this article.
- The Channel Test can only be configured on a Master card (within a Domain).
The Channel Test can be configured in the Board page of the Software Front Panel.
- There are 4 Channel Tests and only the first one can be used with the Test Logic
The following screenshot shows Channel Test configured with Expect Data set to 0xAA55, and the Channel Mask set to 0xFFFF.
The Test Logic is configured to sample the Channel Test signal and test for a falling edge. The result drives the Sequence Controller to enter the run state.
The following is a C example which configures the Channel Test and then routes the resulting event to the Run Trigger:
SHORT nHandle, nStatus;
GtDio6xInitialize(1, &nHandle, &nStatus);
//Set the Expect Data to 0xAA55, and the Channel Mask to 0xFFFF to test channels 0-15
GtDio6xSetSequenceChannelTest(nHandle, 1, 0xAA55, 0xFFFF, &nStatus);
//Configure the Test Logic to sample the Channel Test and test for falling edge
//Route result to Run trigger in order to drive the sequencer controller
GtDio6xSetTrigger(nHandle, GTDIO6X_TRIGGER_RUN, GTDIO6X_RESOURCE_SOURCE_CHANNEL_TEST_1, FALSE, GTDIO6X_RESOURCE_TEST_FALLING_EDGE, GTDIO6X_RESOURCE_RESET_BURST_START, &nStatus);