GXFPGA Schematic Entry Tutorial

This section will go over the basic workflow to start designing and loading a FPGA configuration for the Gx3700.

The following topics are available:

Introduction

Downloading Altera Design FPGA Design Tools

Create New Project

Creating Design File with Schematic Entry

Phase 1 - Creating the FPGA design - 32 bit Full Adder

Phase 2 - Creating the FPGA Design - 2 to 1 Clock Mux

Phase 3 - Creating the FPGA Design - 32 bit Dynamic Digital Pattern Sequencer

Configure Project to Output SVF and RPD Files

Compile an Example Project and Build RPD and SVF Files

Simulating the Design

Load Gx3700 with SVF File

Testing the Design