Description
The GT5920 100MHz frequency multiplier module increases the upper test rate limit to 100 MHz. The increase in test rate is achieved by interleaving a single I/O pin into two parallel memory locations. The GT5920 provides 16 Input or Output pins (in groups of 8 pins). The GT5920 is a GT5150 and GT5900 plug-in unit.
Architecture
The GT5920 frequency multiplier module converts the 32, 50 MHz I/O channels into 16, 100 MHz I/O channels. The memory MUX/interleave logic is designed into a single high-speed programmable logic device, thereby minimizing propagation delays. Concurrent high and low word memory locations are interleaved using opposite phases of the programmable output clock. Each I/O pin has a corresponding termination that can be globally enabled or disabled through software control.
Programming
The GT5920 Module is controlled via the host GT5150 or GT5900. Programmable functions include:
- Signal termination enable/disable
- I/O data direction
- Tri-state control
Applications
- Up to 100 MHz test rate applications
- Hard drive testing
- IC testing
- Bus emulation
GT5920 Specifications
| General |
|---|
| I/O Channels per Module | 16 (max) |
| Terminations | Software programmable On/Off
(socketed)
180/390 Ω factory Installed |
| Type | 245 (Balanced Output) |
| Input Level | High: 2.0 V (min)
Low: 0.8 V (max) |
| Ouput Level | High: 2.0 V (min), 3.0 V (typ)
Low: 0.3 V (typ), 55 V (max) |
| Output Current | High: -60 mA (min), -115 mA (typ), -200 mA (max)
Low: 60 mA (min), 115 mA (typ), 200 mA (max) |
| Short Circuit Current | -80 mA (min)
-140 mA (typ)
-250mA (max) |
| Power | 5 VDC @ 500 mA |
| Propagation | Delay Output: 0.4 ns (min), 1.3 ns (typ), 2.2 ns (max)
Delay Input: 1.5 ns (min), 3.5 ns (typ), 5 ns (max) |
| Output Skew | 2.0 ns (min) |
| Operating Temperature | 0 °C to +50 °C |
| Storage Temperature | -20 °C to +70 °C |
| Size | 4.40" X 3.40" |
| Weight | 50 g |
Note: Specifications are subject to change without notice.
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